Short Bio

PhD. student and full-time researcher at the Department of Computer Architecture, I obtained the degrees Bac +3 in Computer Science (2010), Bac +5 in Computer Science (2013) and Master in Audiovisual Information Systems (2011). During the academic year 2009/2010, I received an Erasmus scholarship and spent 2 semesters at the University of Luxembourg.

My interest focuses in High Performance Computing, Heterogeneous Architectures, Graphics Processors and Transactional Memory. In the past, I have collaborated with other research groups and companies where I had the opportunity to work in different areas like Image and Video Processing, Software Development, Programming Languages, among others.

In 2014 and 2015 I had the opportunity to collaborate with the NUCAR group, lead by Prof. David Kaeli, in a project concerning hardware support for Transactional Memory on GPU architectures using the multi2sim simulation framework.

Publications

Alejandro Villegas, Rafael Asenjo, Angeles Navarro, Oscar Plata, David Kaeli
Lightweight Hardware Transactional Memory for GPU Scratchpad Memory,
IEEE Transactions on Computers. no. 99, Nov. 2017. Málaga, Spain, September 2017
http://ieeexplore.ieee.org/document/8119530/
Indexed: JCER Q1, Impact Factor: 2.916

Alejandro Villegas, Ernesto Rittwagen, Angeles Navarro, Rafael Asenjo, Oscar Plata
Planificación thread-to-cluster de aplicaciones que utilizan memoria transaccional sobre un procesador heterogéneo,
XXVIII Edición de las Jornadas de Paralelismo, JP'17 Málaga, Spain, September 2017

Alejandro Villegas, Angeles Navarro, Rafael Asenjo, Oscar Plata
Towards a Software Transactional Memory for heterogeneous CPU-GPU processors,
3rd IEEE International Workshop on Reengineering for Parallelism in Heterogeneous Parallel Platforms (Repara 2017, part of ParCo2017) Bologna, Italy, September 2017

Alejandro Villegas, Angeles Navarro, Rafael Asenjo, Oscar Plata, Rafael Ubal, David Kaeli
Hardware support for scratchpad memory transactions on GPU architectures,
23rd International European Conference on Parallel and Distributed Computing, EuroPar'17 Santiago de Compostela, Spain, September 2017
Indexed: CORE A (2018)

Yifan Sun, Xiang Gong, Amir Kavyan Ziabari, Leiming Yu, Xiangyu Li, Saoni Mukherjee, Carter McCardwell, Alejandro Villegas, David Kaeli
Hetero-Mark, A Benchmark Suite for CPU-GPU Collaborative Computing,
IEEE International Symposium on Workload Characterization (IISWC), 2016. Providence, Rhode Island, USA, September 2016

E. Villegas, A. Villegas, A. Navarro, R. Asenjo and O. Plata
Evaluación del Consumo Energético de la Memoria Transaccional Software en Procesadores Heterogéneos,
XXVII Jornadas de Paralelismo (part of Jornadas Sarteco). Salamanca, Spain, September 2016

E. Villegas, A. Villegas, A. Navarro, R. Asenjo, Y. Ukidave and O. Plata
Energy Efficiency of Software Transactional Memory in a Heterogeneous Architecture,
8th Workshop on the Theory of Transactional Memory (WTTM 2016 co-located with PODC 2016). Chicago (IL), USA, July 2016

A. Villegas, R. Asenjo, A. Navarro and O. Plata
Improvements in Hardware Transactional Memory for GPU Architectures,
19th Workshop on Compilers for Parallel Computing, (CPC'16). Valladolid, Spain, July 2016

A. Villegas, A. Navarro, R. Asenjo and O. Plata
Memoria Transaccional Hardware en Memoria Local de GPU,
XXVI Edición de las Jornadas de Paralelismo, JP 2015. Córdoba, Spain, 23-25 September, 2015

A. Villegas, A. Navarro, R. Asenjo, O. Plata, R. Ubal and D. Kaeli
Hardware support for Local Memory Transactions on GPU Architectures,
10th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT 2015, part of FCRC 2015). Portland, Oregon, USA. June 15-16, 2015

A. Villegas
Towards a Hardware Transactional Memory for GPU Local Memory,
XXIII Jornadas de Concurrencia y Sistemas Distribuidos 10, 11, 12 June, 2015, Málaga

S. Tabik, A. Villegas, E.L. Zapata, L.F. Romero,
Optimal tilt and orientation maps: a multi-algorithm approach for heterogeneous multicore-GPU systems,
The Journal of Supercomputing, 135-147, 2013.

S. Tabik, A. Villegas, E.L. Zapata, L.F. Romero,
A Fast GIS-tool to Compute the Maximum Solar Energy on Very Large Terrains,
Procedia Computer Science, Volume 9, 2012, Pages 364-372.

Teaching

2017/2018 Grado en Podología: Tecnologías de la información y la comunicación aplicadas a la podología
2017/2018 Grado en Ingeniería Electrónica, Robótica y Mecatrónica: Fundamentos de Computadores
2016/2017 Grado en Podología: Tecnologías de la información y la comunicación aplicadas a la podología
2016/2017 Grado en Ingeniería en Tecnologías Industriales: Fundamentos de Computadores
2016/2017 Curso de adaptación al Grado de Ingeniería de Computadores: Arquitectura de computadores
2015/2016 Grado en Podología: Tecnologías de la información y la comunicación aplicadas a la podología
2015/2016 Curso de adaptación al Grado de Ingeniería de Computadores: Arquitectura de computadores

Office hours: Monday 9:00 - 11:00
I live in the lab, call anytime!

Mentoring

Undergraduate Thesis:
Grado en Ingeniería de Computadores. Student: Emilio Villegas. Energy Consumption Analysis of Software Transactional Memory on Low-Power Processors. July 2016. (Co-advised with Prof. Rafael Asenjo)
Grado en Ingeniería de Computadores. Student: Ernesto Rittwagen. Concurrent execution of Transactional Memory applications on heterogeneous processors. July 2017. (Co-advised with Prof. Oscar Plata)

Contact

Alejandro Villegas
Office 2.3.10
Department of Computer Architecture
University of Malaga
E.T.S. Ingenieria Informatica
Campus de Teatinos
29071 Malaga, Spain

Fax: +34 95 213 2790
Phone: +34 95 213 3387
E-mail: avillegas at ac.uma.es



Last Update: 01/2018