DR. JULIO VILLALBA MORENO Full Professor Department of Computer Architecture University of Malaga, SPAIN

Publications

• Conferences
• Internacional Journals
• Books and chapter of books

Conferences

National Conferences

Internacional Conferences 

National Conferences

AUTHORS:    N. Guil, J. Villalba and E.L. Zapata        

TITLE:  Transformada Rápida de Hough para la Detección de Segmentos 

CONFERENCE:    V Simposium Nacional de Reconocimiento de Formas   

PUBLICATION:   Proceeding of  CONFERENCE, pp. 55-62   

LOCATION:   Valencia    

AUTHORS:   Joaquín Olivares, Javier Hormigo, Ignacio Benavides y Julio Villalba   

TITLE:  Implementación de un sumador matricial en FPGA mediante técnicas de aritmética on line Radix-2 SD 

CONFERENCE:   XIV Jornadas de Paralelismo 

PUBLICATION:   Proceedings  CONFERENCE, pp. 271-275 

LOCATION:   Leganés, Madrid     

TITLE:  Alternativas al cálculo de la estimación de movimiento en MPEG 

CONFERENCE:   XV Jornadas de Paralelismo 

PUBLICATION:   Proceedings  CONFERENCE, Vol I.   Pag 84-89  

LOCATION:   Almería     

Internacional Conferences

AUTHORS:   E. Antelo, J.D. Bruguera, J. Villalba and E.L. Zapata  

TITLE:  Redundant CORDIC Rotator Based on Parallel Prediction    

CONFERENCE:   12th IEEE Symposium on Computer Arithmetic    

PUBLICATION:  Proceedings, pp. 172-179    

LOCATION:  Bath, U.K  

YEAR:  July, 19-21, 1995 

AUTHORS:   J. Villalba, J.A. Hidalgo, E.L. Zapata, E. Antelo and J.D. Bruguera    

TITLE:  CORDIC Architectures with Parallel Compensation of the Scale Factor    

CONFERENCE:  IEEE Int'l Conf. on Application-Specific Array Processor (ASAP'95)   

PUBLICATION:  Proceedings of the Conference, pp. 258-269   

LOCATION:  Strasburgo    

YEAR:  July, 24-26,1995    

AUTHORS:   R. Osorio, E. Antelo, J.D. Bruguera, J. Villalba and E.L. Zapata    

TITLE:    Digit On-Line Large Radix CORDIC Rotator    

CONFERENCE:   IEEE Int'l Conf. on Application-Specific Array Processor (ASAP'95)    

PUBLICATION:  Proceedings pp. 246-257    

LOCATION:  Strasburgo    

YEAR:  July, 24-26,1995    

AUTHORS:  J. Villalba, J.C. Arrabal, E. Antelo, J.D. Bruguera and E.L. Zapata    

TITLE:  Radix-4 Vectoring CORDIC Algorithm and Architectures    

CONFERENCE:  IEEE Int'l Conf. on Application-Specific systems, architectures and  Processors (ASAP'96)

PUBLICATION:  Proceedings pp.55-64    

LOCATION:  Chicago, USA    

YEAR:  August, 19-21-1996   

AUTHORS:   E. Antelo, J.D. Bruguera, T. Lang, J. Villalba and E.L. Zapata 

TITLE:  High Radix Cordic Rotation based on Selection by Rounding  

CONFERENCE:   Euro-Par'96         

PUBLICATION:  Proceedings pp. 155-164    

LOCATION:  Lyon, France  

YEAR:  August 27-29, 1996   

AUTHORS:  J. Villalba and T. Lang 

TITLE:  Low Latncy Word Serial CORDIC  

CONFERENCE: 11th International Conference on Aplication-specific Systems, Architectures and Procesors (ASAP97)    

PUBLICATION:  Proceedings pp. 124-131   

LOCATION:  Zurich, Switzerland  

YEAR:  July 1997  

AUTHORS:  D. Reche, J. Villalba and E.L. Zapata 

TITLE:  Three dimensional Rotations based on General Purpose 3D CORDIC Algorithm  

CONFERENCE:  XII Conference on Design of Circulits and Integrated Systems. DCIS'97 

PUBLICATION:  Proceedings pp. 753-758     

LOCATION:  Sevilla  

YEAR:  Nov. 1997  

AUTHORS:  Julio Villalba 

TITLE:   Multimedia applications based on rotations  

CONFERENCE:   Dagstuhl seminar 98: Architectural and  arithmetic support for multimedia  

PUBLICATION:  Seminar- Report; 222, 30.08.1998-04.09.1998 (98351), p. 11   

LOCATION:  Schloss Dagstuhl (Saarbrucken) , Germany  

YEAR:  August 1998  

AUTHORS:   E. Saez, J. Villalba, J. Hormigo, F.J. Quiles, J.I. Benavides y E.L. Zapata  

TITLE:   FPGA implementation of a variable precisio  CORDIC processor  

CONFERENCE:  13th Conference on Design of  Circuits and Integrated Systems (DCIS'98) 

PUBLICATION:  Proceedings, pp. 604-609 

LOCATION:   Madrid  

YEAR:  17--20 Noviembre de 1998 

AUTHORS:   J. Hormigo, J. Villalba y E.L. Zapata  

TITLE:   CORDIC Algorithm with Digits Skipping   

CONFERENCE:  32th Asilomar Conference on Signals, Systems, and Computers     

PUBLICATION:  Proceedings, pp.194-198   

LOCATION:   Monterey (California)    

YEAR:  1--4 Noviembre de 1998   

AUTHORS:   J. Hormigo, J. Villalba y E.L. Zapata 

TITLE:   A Hardware Approximation to Interval Arithmetic for Sine and Cosine Functions  

CONFERENCE:   IMACS/GAMS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN-98) 

PUBLICATION:  Proceedings, pp. 58-65 

LOCATION:   Budapest (Hungria) 

YEAR:  22--25 Septiembre de 1998 

AUTHORS:   M. G. Peñalver, J. Hormigo, J. Villalba y E.Saez and E. L. Zapata  

TITLE:   FPGA implementation of a CORDIC processor with reduced number of  iterations 

CONFERENCE:  14th Conference on Design of Circuits and Integrated Systems (DCIS'99)

PUBLICATION:  Proceedings del CONFERENCE 

LOCATION:   Palma de Mallorca     

YEAR:  16--19 Noviembre de 1999   

AUTHORS:   J. Hormigo, J. Villalba y E.L. Zapata     

TITLE:   Arithmetic Unit for the Computation of Interval Elementary Functions     

CONFERENCE:  25th EUROMICRO Conference, Workshop on Digital System Design  

PUBLICATION:  Proceedings, vol. 1, pp. 63-66    

LOCATION:  Milan (Italy)    

YEAR:   8—10 Septiembre de 1999   

AUTHORS:   J. Hormigo, J. Villalba y E.L. Zapata 

TITLE:   Interval sine and Cosine  Functions Computation Based on Variable-Precision CORDIC Algorithm 

CONFERENCE:   IEEE Symposium on Computer Arithmetic (ARITH'14)

PUBLICATION:   Proceedings of 14th IEEE Symposium on Computer Arithmetic, pp. 186-193    

LOCATION:   Adelaide (Australia) 

YEAR:  14-16 Abril de 1999 

AUTHORS:   J. Villalba, J. Hormigo, M.A. Gonzalez y E.L. Zapata     

TITLE:   FPGA implementation of an interval elementary functions processor     

CONFERENCE:  : 15th Conference on Design of Circuits and Integrated Systems (DCIS'2000    

PUBLICATION:  Proceeding del CONFERENCE    

LOCATION:  Montpellier (Francia)    

YEAR:  21—24 Noviembre, 2000    

AUTHORS:   J. Hormigo, J. Villalba y M. J. Schulte     

TITLE:   Variable-Precision Exponential Evaluation     

CONFERENCE:   IMACS/GAMS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN-2000)    

PUBLICATION:  Proceedings   

LOCATION:   Karlsruhe (Alemania)    

YEAR:  19--22 Septiembre, 2000    

AUTHORS:   J. Villalba, J. Hormigo, M.A. Gonzalez y E.L. Zapata     

TITLE:   MMX architecture extension to support the rotation operation    

CONFERENCE:   IEEE International Conference on Multimedia and Expo     

PUBLICATION:  Proceeding del CONFERENCE    

LOCATION:  New York    

YEAR:  30 Julio - 2 Agosto 2000    

AUTHORS:   J. Hormigo, J. Villalba y M. J. Schulte     

TITLE:   Hardware  algorithm for Variable-Precision Logarithm     

CONFERENCE:  12th IEEE International Conference on Application specific Systems, Architectures and Processors (ASAP 2000)

PUBLICATION:  Proceeding ASAP 2000, pp. 215-224

LOCATION:   Boston (EEUU)    

YEAR:  10--12 Julio de  2000

AUTHORS:  : J. Hormigo, J. Villalba y  M. J. Schulte 

TITLE:   Hardware  Algorithm for Variable-Precision Division 

CONFERENCE:  4th Conference on Real Numbers and Computers 

PUBLICATION:  Proceedings RNC4 (Peter Kornerup (Ed.)), pp. 185-194  

LOCATION:   Dagstuhl (Alemania)    

YEAR:  17--19 Abril de 2000 

AUTHORS:  J. Villalba, G. Bandera, M. A. Gonzalez, J. Hormigo y E.L.  Zapata    

TITLE:  Polynomial Evaluation on Multimedia Processor    

CONFERENCE: 13th IEEE International Conference on Application specific Systems, Architectures and Processors (ASAP 2002)

PUBLICATION:  Proceedings pp. 265-276     

LOCATION:   San Jose (EE.UU.)    

YEAR:  17-19 Julio 2002    

AUTHORS: G. Bandera,  M. A. Gonzalez, J. Villalba, J. Hormigo y E.L.  Zapata    

TITLE:  Evaluation of elementary functions using multimedia features 

CONFERENCE:  18th Annual IEEE International Parallel & Distributed Processing Symposium

PUBLICATION:  Proceedings pp. 90   

LOCATION:   Santa Fe, Nuevo Mexico (EE.UU.)    

YEAR:  26-30 Abril 2004 

AUTHORS:  Javier Hormigo, Joaquín Olivares, Julio Villalba, Ignacio Benavides

TITLE:  New on-line comparator with no on-line delay 

CONFERENCE:  8th World Muticonference on Systemics, Cybernetics and informatics (SCI 2004) 

PUBLICATION:  Proceedings Vol II. Pag 45-49     

LOCATION:   Orlando, Florida (EE.UU.)    

YEAR:  18-21 Julio 2004    

AUTHORS:  Javier Hormigo, Joaquín Olivares, Ignacio Benavides y Julio Villalba

TITLE:  Estimación de movimiento en MPEG mediante técnicas de aritmética on-line sobre FPGA 

CONFERENCE:   3ª Conferencia Iberoamericana en sistemas, cibernética e informática (CISCI 2004) 

PUBLICATION:  Proceedings, Vol II. Pag. 213-218      

LOCATION:   Orlando, Florida (EE.UU.)    

YEAR:  21-25 Julio 2004    

AUTHORS:  Javier Hormigo, Manuel Sánchez,  Mario G. Peñalver, Gerardo Bandera and Julio VIllalba  

TITLE:   Optimized implementation of trigonometric functions with large input argument 

CONFERENCE:  19th Conference on Design of Circuits and Integrated Systems (DCIS'04)

PUBLICATION:  Proceedings del CONFERENCE 

LOCATION:   Bordeaux (France)     

YEAR:  24-26 Noviembre de 2004   

AUTHORS:  Joaquín Olivares, Javier Hormigo, Julio Villalba and Ignacio Benavides

TITLE:  Minimum Sum of Absolute Differences implementation in a single FPGA device 

CONFERENCE:  The international Conference on Field Programmable Logic and Applications (FPL)

PUBLICATION:  Lecture notes in computer sciences, vol. 3203, pp. 986-990 

LOCATION:   Antwerp, Bélgica.      

YEAR:  30- Agosto, 1-Septiembre de 2004    

AUTHORS:  J. Villalba, J. Hormigo, J. M . Prades y E.L.  Zapata    

TITLE:   Hardware implementation of the Wavelet Transform for JPEG2000 

CONFERENCE: Conference on VLSI Circuits and Systems II, part of the SPIE Symposium on Microtechnologies for the New Millennium 2005

PUBLICATION:  Proceeding of SPIE vol. 5837-24, pp. 193-203

LOCATION:   Sevilla (España)    

YEAR:  9-11 Mayo 2005 

AUTHORS:  E. Antelo and J. Villalba 

TITLE:  Low Latency Pipelined Circular CORDIC 

CONFERENCE: 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005)

PUBLICATION:  Proceeding del CONFERENCE, pp. 280-288  

LOCATION:  Cape Cod, Massachusetts  (USA)    

YEAR:  27-29 Junio 2005 

AUTHORS:  J. Villalba, J. Hormigo, J. M . Prades y E.L.  Zapata    

TITLE: On-line Multioperand Addition based on On-line Full-Adders 

CONFERENCE: 16th IEEE International Conference on Application specific Systems, Architectures and Processors (ASAP 2005)

PUBLICATION:  Proceedings del CONFERENCE, pp. 322-327 

LOCATION:   Samos (Grecia)    

YEAR:  23-25 Julio 2005 

AUTHORS:  F. J. Jaime, J. Villalba, M.A. González y  E.L.  Zapata    

TITLE:   Hybrid Residue Generators Using Carry-Save Adders  

CONFERENCE: 20th Conference on Design of Circuits and Integrated Systems (DCIS'05) 

PUBLICATION:  Proceedings del CONFERENCE 

LOCATION:   Lisboa (Portugal) 

YEAR:  23-25 Noviembre 2005 

AUTHORS:  F.J. Jaime, J. Villalba, J. Hormigo y E.L.  Zapata    

TITLE:  Pipelined Architecture for Accurate Floating Point Range Reduction 

CONFERENCE: 7th Conference on Real Numbers and Computers 

PUBLICATION:  Proceedings del CONFERENCE, pp. 59-68 

LOCATION:   Loria, Nancy, France    

YEAR:  10-12 July  2006 

AUTHORS:  F.J. Jaime, J. Villalba, J. Hormigo y E.L.  Zapata    

TITLE:  Pipelined Architecture for double residue based generator 

CONFERENCE: 17th IEEE International Conference on Application specific Systems, Architectures and Processors (ASAP 2006)

PUBLICATION:  pp. 145-150 

LOCATION:  Steamboat Springs, Colorado, USA    

YEAR:  11-13 Septiembre 2006 

AUTHORS: Joaquín Olivares, Ignacio Benavides, Javier Hormigo and Julio Villalba 

TITLE:   Fast Full-Search block matching Algorithm Motion Estimation Alternatives in FPGA  

CONFERENCE:  The international Conference on Field Programmable Logic and Applications (FPL 06)

PUBLICATION:  Lecture notes in computer sciences, 

LOCATION:  Madrid, Spain.      

YEAR:  28-30- Agosto, 2006    

AUTHORS: Manuel Hernandez Calviño, Ignacio Benavides, Javier Hormigo and Julio Villalba 

TITLE:   Hardware accelerators for the microblaze software embedded processor  

CONFERENCE:  III Southern Conference on Programmable Logic (SPL2007)

PUBLICATION:  Proceeding del CONFERENCE 

LOCATION:  Mar del Plata, Argentina 

YEAR:  22-28- Febrero, 2007    

AUTHORS:  F.J. Jaime, J. Villalba, J. Hormigo y E.L.  Zapata    

TITLE:  Improving the Troughput of On-line Addition for Data Streams 

CONFERENCE: 18th IEEE International Conference on Application specific Systems, Architectures and Processors (ASAP 2007)

PUBLICATION:  Proceedings, pg. 272-277 

LOCATION:  Montreal, Quebec, Canada 

YEAR:  9-11 July 2007 

AUTHORS:  F.J. Jaime, J. Villalba, J. Hormigo y E.L.  Zapata    

TITLE:  Profit Analysis of Instructions with Parallel Access to Memory 

CONFERENCE: Workshop on Application Specific Processors, WASP 2007

PUBLICATION:  En revision 

LOCATION:  Salzburg, Austria 

AUTHORS:  F.J. Jaime, J. Villalba, J. Hormigo y E.L.  Zapata    

TITLE:   SIMD Enhacements for a Hough Transform Implementation  

CONFERENCE:  11th Euromicro Conference on Digital Systems Designs, Architectures, methods and tools (DSD 2008)

PUBLICATION:  Proceeding del CONFERENCE

LOCATION:  Parma, Italy 

YEAR:  3-5 September 2008 

AUTHORS:  F.J. Jaime, J. Villalba, J. Hormigo y E.L.  Zapata    

TITLE:    New SIMD Instructions set for Image Processing Applications Enhacement 

CONFERENCE:   IEEE Int. Conf. on Image Processing 2008  (ICIP 2008)

PUBLICATION:  Proceeding del CONFERENCE

LOCATION:  San Diego, California, USA

YEAR:  12-15 October 2008 

AUTHORS:  J. Fenández, I. Cornejo, MM. Grana, S. Ahumada, C. García, F. Vargas,  J. Hormigo, J. Villalba y MS. Dawid 

TITLE:   Vigner-Ville analysis of autonomic outflow of normal subjets during the auntonomic deep breathinh test 

CONFERENCE:   XXXV Congress of the Spanish Society of Phycological Sciences

PUBLICATION:  Proceeding del CONFERENCE, 

LOCATION:  Valencia, Spain

YEAR:  17-20 February 2009 

AUTHORS:  F. Quilies, M. Ortiz, F.J. Jaime, J. Villalba, J. Hormigo y E.L.  Zapata 

TITLE:    Efficient Implementation of Carry-Save Adders in FPGAs.  

CONFERENCE:  20th IEEE International Conference on Application specific Systems, Architectures and Processors (ASAP 2009)

PUBLICATION:  Proceedings  pp 207-210 

LOCATION:  Boston,  USA 

YEAR:  7-9 Julyr 2009 

AUTHORS:  F. Quilies, M. Ortiz, F.J. Jaime, J. Villalba, J. Hormigo y E.L.  Zapata 

TITLE:   Efficient Mapping on FPGA of convolution computation based on combined CSA-CPA Accumulator 

CONFERENCE:    16th IEEE International Conference on Electronics, Circuits and Systems

PUBLICATION:  Proceedings pp. 419-422 

LOCATION:  Yasmine Hammamet, Tunisia 

YEAR:  13-16 Dec, 2009 

AUTHORS:  A. Vázquez, J. Villalba and E. Antelo  

TITLE:   Computation of Decimal Transcendental Functions using the CORDIC Algorithm 

CONFERENCE:  19th IEEE Symposium on Computer Arithmetic (ARITH-19 2009)

PUBLICATION:  Proceeding del CONFERENCE, pp. 179-186  

LOCATION:  Portland, Oregon  (USA)    

YEAR:  8-10 Junio 2009 

AUTHORS:  F. Quiles, M. Ortiz, J. Hormigo, J. Villalba  

TITLE: UCORE: Reconfigurable platform for educational purposes

CONFERENCE: 2010 International Conference on ReConFigurable Computing and FPGAs

PUBLICATION:  Proceeding del CONFERENCE, pp.   

LOCATION:  Cancum, Mexico 

YEAR:  13-15 December 2010 

Internacional Journals

AUTHORS: N. Guil, J. Villalba and E.L. Zapata

TITLE: A Fast Hough Transform for Segment Detection

AUTHORS: N. Guil, T. Lang, J. Villalba and E.L. Zapata

TITLE:  CORDIC Based Parallel/Pipelined Architecture for the Hough Transform

AUTHORS: E. Antelo, J. Villalba, J.D. Bruguera and E.L. Zapata

TITLE:  High Performance Rotation Architectures Based on Radix-4 CORDIC Algorithm

TITLE: Radix-4 Vectoring CORDIC Algorithm

TITLE: Parallel Compensation of scale factor for the CORDIC algorithm

TITLE: CORDIC  Processor for Variable-Precision Interval Arithmetic

TITLE:  Estimación de Movimiento en MPEG Mediante Técnicas de Aritmética On-Line sobre FPGA

AUTHORS : Julio Villalba, Tomas Lang y Mario A. González

TITLE:  Double Residue Modular Range Reduction

TITLE: SAD computation based on On-line arithmetic for Motion Estimation

TITLE: Optimized Range Reduction for the CORDIC algorithm

TITLE: Low latency pipelined 2D and 3D CORDIC processors

TITLE: Pipelined Architecture for Additive Range Reduction

AUTHORS : Francisco J. Jaime, Miguel.A. Sánchez, Javier Hormigo, Julio Villalba, Emilio L. Zapata

TITLE:   Enhanced Scaling-Free CORDIC

JOURNAL:   IEEE Transactions on Circuits and Systems I

,  vol. 57, num. 7, pp. 1654-1662, 2010

AUTHORS : Francisco J. Jaime, Miguel.A. Sánchez, Javier Hormigo, Julio Villalba, Emilio L. Zapata

TITLE:   High Speed Algorirhms and Architectures for Range Reduction Computation

JOURNAL:   IEEE Transactions on Very Largue Scale Integration (VLSI) Systems 

,  vol. 19, num. 3, pp. 512-516, 2011

AUTHORS :  Julio Villalba, Tomas Lang, Javier Hormigo

TITLE:   Radix-2 Multioperand and Multiformat Streaming On-line Addition

JOURNAL:   IEEE Transactions on Computers

AUTHORS :  Vazquez, A.  Villalba, J.  Antelo, E.  Zapata, E

TITLE:   Redundant Floating Point Decimal CORDIC Algorithm

JOURNAL:   IEEE Transactions on Computers

vol 61, num 11, pg. 1551 – 1562,  2012

AUTHORS :  Hormigo, J.  Villalba,  E.  Zapata, E

TITLE:   Multi-operand  Redundant Adders on FPGAs

JOURNAL:   IEEE Transactions on Computers

vol 99, Digital Object Identifier: 10.1109/TC.2012.168, vol 62, num 10, 2013

TITLE:   Measuring Improvement When Using HUB Formats to Implement Floating-Point Systems Under Round-to-Nearest

JOURNAL:   IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI: 10.1109/TVLSI.2015.2502318, vol 24, num. 6, pp. 2369-2377, june  2016

AUTHORS :  Hormigo, J.  Villalba

TITLE:   New Formats for Computing with Real-Numbers under Round-to-Nearest

JOURNAL:  IEEE Transactions on Computers

 vol 99, Digital Object Identifier: 10.1109/TC.2015.2479623,
vol. 65, num 7, pages 2158 - 2168, 2016

AUTHORS :  C. Garcia Vega; S. Gonzalez Navarro; P. Balboa-La Chica; J. Villalba. 

TITLE:  Decimal Multiformat Online Addition

JOURNAL:   IEEE Transactions on Computers

Digital Object Identifier: 10.1109/TC.2016.2516009, vol. 65, num 10, pages 3203 – 3209, 2016

AUTHORS :  J. Hormigo, J. Villalba. 

TITLE: HUB-Floating-Point for improving FPGA implementations of DSP Applications

AUTHORS :  Julio Villalba-Moreno, Javier Hormigo, Sonia González. 

TITLE:  Unbiased Rounding for HUB Floating-Point Addition

AUTHORS :  Julio Villalba-Moreno, Javier Hormigo, Sonia González. 

TITLE:  Fast HUB Floating-point Adder for FPGA

 Books and chapter of books

AUTHORS: Javier Hormigo, Julio Villalba y Emilio L. Zapata

TITLE: A hardware approach to interval sine and cosine computation

TITLE: Variable-Precision Exponential Evaluation

TITLE: Prácticas de Estructura de Computadoeres

TITLE: Hardware para intervalos