Journal Papers: Last 5 Years
Author: J. Villalba

2022

2021

High-Radix Formats for Enhancing Floating-Point FPGA Implementations [doi]
J. Villalba, J. Hormigo
Circuits, Systems, and Signal Processing, December 2021

2020

2019

Fast HUB Floating-Point Adder for FPGA [doi]
J. Villalba, J. Hormigo, S. Gonzalez-Navarro
IEEE Transactions on Circuits and Systems II: Express Briefs, 66 (6), June 2019, pp. 1028-1032

2018

Unbiased Rounding for HUB Floating-Point Addition [doi]
J. Villalba, J. Hormigo, S. Gonzalez-Navarro
IEEE Transactions on Computers, 67 (9), September 2018, pp. 1359-1365

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