All Papers
Author: M. Gonzalez

2022

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2013

Efficient Floating-Point Representation for Balanced Codes for FPGA Devices [doi]
J. Villalba, J. Hormigo, F. Corbera, M. Gonzalez, E.L. Zapata
IEEE 31st International Conference on Computer Design (ICCD'13), Asheville (NC), USA, October 2013 (Best Paper Award)

2012

2011

2010

2009

2008

2007

2006

Double-Residue Modular Range Reduction for Floating-Point Hardware Implementations [doi]
J. Villalba, T. Lang, M. Gonzalez
IEEE Transactions on computers, 55 (3), March 2006, pp. 254-267

2005

Hybrid Residue Generators Using Carry-Save Adders
F.J. Jaime, J. Villalba, M. Gonzalez, E.L. Zapata
20th Conference on Design of Circuits and Integrated Systems (DCIS’05), Lisbon (Portugal), November 2005

2004

Optimized FPGA Implementation of Trigonometric Functions with Large Input Arguments
J. Hormigo, M. Sanchez, M. Gonzalez, G. Bandera, J. Villalba
XIX Conference on Design of Circuits and Integrated Systems (DCIS'04), Bordeaux (France), November 2004

Evaluation of Elementary Functions Using Multimedia Features [doi]
G. Bandera, M. Gonzalez, J. Villaba, J. Hormigo, E.L. Zapata
18th International Parallel and Distributed Processing Symposium (IPDPS'04), Santa Fe (NM, USA), April 2004

2003

2002

Polynomial Evaluation on Multimedia Processor [doi]
J. Villalba, G. Bandera, M. Gonzalez, J. Hormigo, E.L. Zapata
13th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'02), San Jose (CA, USA), July 2002, pp. 265-277

2001

2000

MMX-like Architecture Extension to Support the Rotation Operation [doi]
J. Villalba, J. Hormigo, M. Gonzalez, E.L. Zapata
IEEE International Conference on Multimedia and Expo (ICME'00), New York (NY, USA), July-August 2000

1999

FPGA Implementation of a CORDIC Processor with Reduced Number of Iterations
M. Gonzalez, J. Hormigo, J. Villalba, E. Saez, E.L. Zapata
14th Conference on Design of Circuits and Integrated Systems (DCIS'99), Palma de Mallorca (Spain), November 1999

1998

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