All Papers
Author: R. Asenjo

2022

Lightweight Asynchronous Scheduling in Heterogeneous Reconfigurable Systems [doi]
A. Rodriguez, A. Navarro, K. Nikov, J. Nunez-Yanez, R. Gran, D. Suarez-Gracia, R. Asenjo
Journal of Systems Architecture, 124, March 2022, 102398

2021

Efficient Heterogeneous Matrix Profile on a CPU + High Performance FPGA with Integrated HBM [doi]
J.C. Romero, A. Navarro, A. Vilches, A. Rodriguez, F. Corbera, R. Asenjo
Future Generation Computer Systems, 125, December 2021, pp. 10-23

Efficient Geometrical Clock Synchronization for Pairwise Sensor Systems [doi]
J.A. Fernandez-Madrigal, A. Navarro, R. Asenjo, A. Cruz-Martin
IEEE Sensors Journal, 21 (1), January 2021, pp. 838-846

Efficiency and Productivity for Decision Making on Low-Power Heterogeneous CPU+GPU SoCs [doi]
D.A. Constantinescu, A. Navarro, F. Corbera, J.A. Fernandez-Madrigal, R. Asenjo
The Journal of Supercomputing, 77, January 2021, pp. 44-65

2020

Boosting Productivity of Decision-Making with oneAPI-based Heterogeneous Schedulers on SoCs [link]
D.A. Constantinescu, R. Asenjo
oneAPI Developer Summit 2020, Virtual Event, November 2020

Tutorial: C++ for Heterogeneous Programming: oneAPI (DPC++ and oneTBB) [link]
J. Reinders, M. Voss, P. Reble, R. Asenjo
The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC'20), Virtual Event, November 2020

ScrimpCo: Scalable Matrix Profile on Commodity Heterogeneous Processors [doi]
J.C. Romero, A. Vilches, A. Rodriguez, A. Navarro, R. Asenjo
The Journal of Supercomputing, 76, November 2020, pp. 9189-9210

Characterization, Statistical Analysis and Method Selection in the Two-Clocks Synchronization Problem for Pairwise Interconnected Sensors [doi]
J.A. Fernandez-Madrigal, A. Navarro, R. Asenjo, A. Cruz-Martin
Sensors, 20 (17), art. 4808, August 2020

Parallel Multiprocessing and Scheduling on the Heterogeneous Xeon+FPGA Platform [doi]
A. Rodriguez, A. Navarro, R. Asenjo, F. Corbera, R. Gran, D. Suarez, J. Nuñez-Yañez
The Journal of Supercomputing, 76, June 2020, pp. 4645-4665

Performance Evaluation of Decision Making Under Uncertainty for Low Power Heterogeneous Platforms [doi]
D.A. Constantinescu, A. Navarro, J.A. Fernandez-Madrigal, R. Asenjo
Journal of Parallel and Distributed Computing, 137, March 2020, pp. 119-133

High-Performance Simultaneous Multiprocessing for Heterogeneous System-on-Chip [link]
K. Nikov, J. Nunez-Yanez, M. Hosseinabady, R. Asenjo, A. Rodriguez, A. Navarro
The Thirteenth International Workshop on Programmability and Architectures for Heterogeneous Multicores (MULTIPROG'20) (co-located with HiPEAC'20), Bologna (Italy), January 2020

2019

Exploring Heterogeneous Scheduling for Edge Computing with CPU and FPGA MPSoCs [doi]
A. Rodriguez, A. Navarro, R. Asenjo, F. Corbera, R. Gran, D. Suarez, J. Nuñez-Yañez
Journal of Systems Architecture, 98, September 2019, pp. 27-40

Aceleración de Time-Series Sismográficas en Python [link]
F. Muñoz, T. Grass, R. Asenjo, A. Navarro
XIX Jornadas de Paralelismo (JJPP'19) (parte de las Jornadas Sarteco), Caceres (Spain), September 2019

Soporte OpenCL 2.0 para Intel TBB [link]
F. Muñoz, J.C. Romero, A. Villegas, A. Navarro, A. Rodriguez, R. Asenjo
XIX Jornadas de Paralelismo (JJPP'19) (parte de las Jornadas Sarteco), Caceres (Spain), September 2019

Simultaneous Multiprocessing in a Software-Defined Heterogeneous FPGA [doi]
J. Nunez-Yanez, S. Amiri, M. Hosseinabady, A. Rodriguez, R. Asenjo, A. Navarro, D. Suarez-Gracia, R. Gran-Tejero
The Journal of Supercomputing, 75, August 2019, pp. 4078-4095

Toward a Software Transactional Memory for Heterogeneous CPU-GPU Processors [doi]
A. Villegas, A. Navarro, R. Asenjo, O. Plata
The Journal of Supercomputing, 75, August 2019, pp. 4177-4192

Time Series Heterogeneous Co-execution on CPU+GPU [link]
J.C. Romero, A. Navarro, A. Rodriguez, R. Asenjo, M. Cole
International Conference on Computational and Mathematical Methods in Science and Engineering (CMMSE'19), Rota (Cadiz, Spain), June-July 2019

Solving Large-Scale Markov Decision Processes on Low-Power Heterogeneous Platforms [link]
D.A. Constantinescu, A. Navarro, F. Corbera, J.A. Fernandez-Madrigal, R. Asenjo
International Conference on Computational and Mathematical Methods in Science and Engineering (CMMSE'19), Rota (Cadiz, Spain), June-July 2019

ClinicAppChain: A Low-Cost Blockchain Hyperledger Solution for Healthcare [doi]
D.J. Muñoz, D.A. Constantinescu, R. Asenjo, L. Fuentes
1st International Congress on Blockchain and Applications (BLOCKCHAIN'19), Avila (Spain), June 2019
(Springer, AISC 1010, J. Prieto, A. Kumar Das, S. Ferreti, A. Pinto and J.M. Corchado, Eds., pp. 35-44)

Heterogeneous parallel_for Template for CPU-GPU Chips [doi]
A. Navarro, F. Corbera, A. Rodriguez, A. Vilches, R. Asenjo
International Journal of Parallel Programming, 47 (2), April 2019, pp. 231-233

Evaluation of Heterogeneous Execution on an HPC-Oriented CPU-FPGA System-on-Chip [link]
A. Rodriguez, A. Navarro, R. Asenjo, F. Corbera, R. Gran-Tejero, D. Suarez-Gracia, J. Nunez-Yanez
International Workshop on High-Level Programming for Heterogeneous and Hierarchical Parallel Systems (HLPGPU’19) (co-located with HiPEAC'19), Valencia (Spain), January 2019

Pro TBB: C++ Parallel Programming with Threading Building Blocks [doi]
M. Voss, R. Asenjo, J. Reinders
Apress Ed. (Berkeley, CA, USA), ISBN: 978-1-4842-4398-5, 2019

2018

Time Series Collaborative Execution on CPU+GPU Chips [link]
J.C. Romero, A. Navarro, A. Rodriguez, R. Asenjo, C. Murray
HPC-Europa3 Transnational Access Visitors Meeting (TAM'18), Edinburgh (UK), October 2018

Exploiting Social Network Graph Characteristics for Efficient BFS on Heterogeneous Chips [doi]
L. Remis, M.J. Garzaran, R. Asenjo, A. Navarro
Journal of Parallel and Distributed Computing, 120, October 2018, pp. 282-294

Memoria Transaccional Software en Procesadores CPU+GPU Heterogéneos [link]
A. Villegas, A. Navarro, R. Asenjo, O. Plata
XIX Jornadas de Paralelismo (JJPP'18) (parte de las Jornadas Sarteco), Teruel (Spain), September 2018

Explotando el Nuevo Modulo OpenCL de Intel TBB [link]
J.C. Romero, A. Villegas, A. Navarro, A. Rodriguez, R. Asenjo
XIX Jornadas de Paralelismo (JJPP'18) (parte de las Jornadas Sarteco), Teruel (Spain), September 2018

Workload Partitioning Strategy for Improved Parallelism on FPGA-CPU Heterogeneous Chips [doi]
S. Amiri, M. Hosseinabady, A. Rodriguez, R. Asenjo, A. Navarro, J. Nunez-Yanez
28th International Conference on Field Programmable Logic and Applications (FPL’18), Dublin (Ireland), August 2018

Lightweight Hardware Transactional Memory for GPU Scratchpad Memory [doi]
A. Villegas, R. Asenjo, A. Navarro, O. Plata, D. R. Kaeli
IEEE Transactions on Computers, 67 (6), June 2018, pp. 816-829

Tutorial: An Introduction to Intel Threading Building Blocks (Intel TBB) and its Support for Heterogeneous Programming [link]
R. Asenjo, J. Cownie, A. Fedotov
23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP'18), Vienna (Austria), February 2018

Parallel Algorithms for Computing the Smallest Binary Tree Size in Unit Simplex Refinement [doi]
G. Aparicio, J.M.G. Salmeron, L.G. Casado, R. Asenjo, E.M.T. Hendrix
Journal of Parallel and Distributed Computing, 112 (P2), February 2018, pp. 166-178

Parallelizing Workload Execution in Embedded and High-Performance Heterogeneous Systems [link]
J. Nunez-Yanez, M. Hosseinabady, M. Amiri, A. Rodriguez, R. Asenjo, A. Navarro, R. Gran-Tejero, D. Suarez-Gracia
6th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES’18) (co-located with HiPEAC'18), Manchester (UK), January 2018

2017

On Parallel Branch and Bound Frameworks for Global Optimization [doi]
J.F.R. Herrera, J.M.G. Salmeron, E.M.T. Hendrix, R. Asenjo, L.G. Casado
Journal of Global Optimization, 69 (3), November 2017, pp. 547-560

Simultaneous Multiprocessing on a FPGA+CPU Heterogeneous System-On-Chip [doi]
J. Nuñez-Yañez, M. Hosseinabady, A. Rodriguez, R. Asenjo, A. Navarro, R. Gran-Tejero, D. Suarez-Gracia
3rd International Workshop on Reengineering for Parallelism in Heterogeneous Parallel Platforms (RePara’17) (co-located with ParCo'17), Bologna (Italy), September 2017
(Advances in Parallel Computing, Vol. 32: Parallel Computing is Everywhere, IOS Press, J.D. Garcia, Ed., pp. 677-686)

Towards a Software Transactional Memory for Heterogeneous CPU-GPU Processors [doi]
A. Villegas, A. Navarro, R. Asenjo, O. Plata
3rd International Workshop on Reengineering for Parallelism in Heterogeneous Parallel Platforms (RePara’17) (co-located with ParCo'17), Bologna (Italy), September 2017
(Advances in Parallel Computing, Vol. 32: Parallel Computing is Everywhere, IOS Press, J.D. Garcia, Ed., pp. 707-717)

Planificación Thread-to-Cluster de Aplicaciones que Utilizan Memoria Transaccional Sobre un Procesador Heterogéneo [link]
A. Villegas, E. Rittwagen, A. Navarro, R. Asenjo, O. Plata
XXVIII Jornadas de Paralelismo (JJPP'17) (parte de las Jornadas Sarteco), Malaga (Spain), September 2017

Optimization of a Decision-Making Algorithm for Heterogeneous Platforms [link]
D.A. Constantinescu, A. Navarro, J.A. Fernandez-Madrigal, R. Asenjo
XXVIII Jornadas de Paralelismo (JJPP'17) (parte de las Jornadas Sarteco), Malaga (Spain), September 2017

Motivando al Alumno de Ingeniería Mediante la Plataforma Raspberry Pi [link]
R. Asenjo, S. Gonzalez-Navarro, F. Corbera, A. Navarro, A. Rodriguez, J. Villalba, E.M.T. Hendrix
XXVIII Jornadas de Paralelismo (JJPP'17) (parte de las Jornadas Sarteco), Malaga (Spain), September 2017

Hardware Support for Scratchpad Memory Transactions on GPU Architectures [doi]
A. Villegas, R. Asenjo, A. Navarro, O. Plata, R. Ubal, D. Kaeli
23rd International European Conference on Parallel and Distributed Computing (EuroPar'17), Santiago de Compostela (Spain), August-September 2017
(Springer, LNCS 10417, F. Rivera, T. Pena and J. Cabaleiro, Eds., pp. 273-286)

Heterogeneous Parallel for Template Based on TBB [link]
A. Vilches, A. Navarro, F. Corbera, A. Rodriguez, R. Asenjo
10th International Symposium on High-Level Parallel Programming and Applications (HLPP'17), Valladolid (Spain), July 2017

2016

Breadth-First Search on Heterogeneous Platforms: A Case of Study on Social Networks [doi]
L. Remis, M.J. Garzaran, R. Asenjo, A. Navarro
28th International Symposium on Computer Architecture and High-Performance Computing (SBAC-PAD'16), Los Angeles (CA), USA, October 2016

Evaluación del Consumo Energético de la Memoria Transaccional Software en Procesadores Heterogéneos [link]
E. Villegas, A. Villegas, A. Navarro, R. Asenjo, O. Plata
XXVII Jornadas de Paralelismo (JJPP'16) (parte de las Jornadas Sarteco), Salamanca (Spain), September 2016

Improvements in Hardware Transactional Memory for GPU Architectures [link]
A. Villegas, A. Navarro, R. Asenjo, O. Plata
19th Workshop on Compilers for Parallel Computing (CPC’16), Valladolid (Spain), July 2016

Energy Efficiency of Software Transactional Memory in a Heterogeneous Architecture [link]
E. Villegas, A. Villegas, A. Navarro, R. Asenjo, Y. Ukidave, O. Plata
8th Workshop on the Theory of Transactional Memory (WTTM’16) (co-located with PODC’16), Chicago (IL), USA, July 201

Mapping Streaming Applications on Commodity Multi-CPU and GPU On-Chip Processors [doi]
A. Vilches, A. Navarro, R. Asenjo, F. Corbera, R. Gran, M. Garzaran
IEEE Transactions on Parallel and Distributed Systems, 27 (4), April 2016, pp. 1099-1115

2015

Memoria Transaccional Hardware en Memoria Local de GPU [link]
A. Villegas, A. Navarro, R. Asenjo, O. Plata
XXVI Jornadas de Paralelismo (JJPP'15) (parte de las Jornadas Sarteco), Cordoba (Spain), September 2015

Patrón pipeline Aplicado a Arquitecturas Heterogéneas big.LITTLE [link]
A. Vilches, A. Rodriguez, A. Navarro, F. Corbera, R. Asenjo
XXVI Jornadas de Paralelismo (JJPP'15) (parte de las Jornadas Sarteco), Cordoba (Spain), September 2015

Algoritmos Paralelos de Memoria Compartida que Determinan el Menor Tamaño de un Arb Binario al Refinar un Simplex Regular [link]
G. Aparicio, E.M.T. Hendrix, J.M. Garcia, I. Garcia, L.G. Casado, R. Asenjo
XXVI Jornadas de Paralelismo (JJPP'15) (parte de las Jornadas Sarteco), Cordoba (Spain), September 2015

Workload Distribution and Balancing in FPGAs and CPUs with OpenCL and TBB [doi]
R. Asenjo, A. Navarro, A. Rodriguez, J. Nunez-Yanez
International Symposium on Parallel Computing with FPGAs (ParaFPGA’15) (co-located with ParCo'15), Edinburgh, UK, September 2015
(IOS Press, Advances in Parallel Computing, Vol. 27: Parallel Computing: On the Road to Exascale, pp. 543-551, 2016)

Pipeline Template for Streaming Applications on Heterogeneous Chips [doi]
A. Rodríguez, A. Navarro, R. Asenjo, F. Corbera, A. Vilches, M. Garzaran
International Conference on Parallel Computing (ParCo'15), Edinburgh, UK, September 2015
(IOS Press, Advances in Parallel Computing, Vol. 27: Parallel Computing: On the Road to Exascale, pp. 327-336, 2016)

Parallel Pipeline on Heterogeneous Multi-Processing Architectures [doi]
A. Rodriguez, A. Navarro, R. Asenjo, A. Vilches, F. Corbera, M. Garzaran
1st IEEE International Workshop on Reengineering for Parallelism in Heterogeneous Parallel Platforms (RePara’15) (co-located with ISPA’15), Helsinki, Finland, August 2015

Hardware Support for Local Memory Transactions on GPU Architectures [link]
A. Villegas, A. Navarro, R. Asenjo, O. Plata, R. Ubal, D. Kaeli
10th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT'15), Portland, OR, USA, June 2015

Adaptive Partitioning of Irregular Applications on heterogeneous CPU-GPU chips [doi]
A. Vilches, R. Asenjo, A. Navarro, F. Corbera, R. Gran, M. Garzaran
International Conference on Computational Science (ICCS'15), Reykjavik, Iceland, June 2015
(Elsevier, Procedia Computer Science, Vol. 51, 2015, pp. 140-149)

Towards a Hardware Transactional Memory for GPU Local Memory [link]
A. Villegas, A. Navarro, R. Asenjo, O. Plata
XXIII Jornadas de Concurrencia y Sistemas Distribuidos, Malaga (Spain), June 2015

Reducing Overheads of Dynamic Scheduling on Heterogeneous Chips [link]
F. Corbera, A. Rodriguez, R. Asenjo, A. Navarro, A. Vilches, M.J. Garzaran
Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES’15) (co-located with HiPEAC’15), Amsterdam (The Netherlands), January 2015

2014

Hierarchical Regulation of the Sensor Data Transmission for Networked Telerobots [doi]
A. Martinez-Tenor, A. Gago-Benitez, J.A. Fernandez-Madrigal, A. Cruz-Martin, R. Asenjo, A. Navarro
IEEE SENSORS 2014, Valencia (Spain), November 2014

Strategies for Maximizing Utilization on Multi-CPU and Multi-GPU Heterogeneous Architectures [doi]
A. Navarro, A. Vilches, F. Corbera, R. Asenjo
The Journal of Supercomputing, 70 (2), November 2014, pp 756-771

On the Parallelization of a Three-Parametric Log-Logistic Estimation Algorithm [link]
R. Asenjo, A. Rodriguez, A. Navarro, J.A. Fernandez-Madrigal, A. Cruz-Martin
V Jornadas de Computación Empotrada (JCE'14) (parte de las Jornadas Sarteco), Valladolid (Spain), September 2014

Adaptive Partitioning Strategy for Heterogeneous Chips [link]
A. Vilches, A. Navarro, R. Asenjo, F. Corbera, M. Garzaran
XXV Jornadas de Paralelismo (JJPP'14) (parte de las Jornadas Sarteco), Valladolid (Spain), September 2014

A Case Study of Different Task Implementations for Multioutput Stages in non-trivial Parallel Pipeline Applications [doi]
A. Navarro, R. Asenjo, F. Corbera, A.J. Dios, E.L. Zapata
Parallel Computing, 40 (8), August 2014, pp. 374-393

Adaptive Partitioning Strategies for Loop Parallelism in Heterogeneous Architectures [doi]
A. Navarro, A. Vilches, F. Corbera, R. Asenjo
International Conference on High Performance Computing & Simulation (HPCS’14), Bologna (Italy), July 2014, pp. 120-128

2013

A Case Study of Oversubscription on Multi-CPU & Multi-GPU Heterogeneous Systems [link]
A. Vilches, A. Navarro, F. Corbera, R. Asenjo
13th International Conference on Computational and Mathematical Methods in Science and Engineering (CMMSE'13), Cabo de Gata (Spain), June 2013

2012

A Data Dependence Test based on the Projection of Paths over Shape Graphs [doi]
A. Navarro, F. Corbera, R. Asenjo, R. Castillo, E.L. Zapata
Journal of Parallel and Distributed Computing, 72 (12), December 2012, pp. 1547-1564

Global DAta Re-Allocation via Communication Aggregation in Chapel [doi]
A. Sanz, R. Asenjo, J. Lopez, R. Larrosa, A. Navarro, V. Litvinov, S-E. Choi, B.L. Chamberlain
IEEE 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD’12), New York (NY), USA, October 2012

2011

High-Level Template for the Task-Based Parallel Wavefront Pattern [doi]
A. Garcia, R. Asenjo, A. Navarro, F. Corbera, E.L. Zapata
18th Annual IEEE International Conference on High Performance Computing (HiPC’11), Bangalore (India), December 2011

Wavefront Template for the Task-Based Programming Model [link]
A. Garcia, R. Asenjo, A. Navarro, F. Corbera, E.L. Zapata
24th International Workshop on Languages and Compilers for Parallel Computing (LCPC’2011), Colorado State University, Fort Collins (CO), USA, September 2011

A First Implementation of Parallel IO in Chapel for Block Data Distribution [doi]
R. Larrosa, R. Asenjo, A. Navarro, B.L. Chamberlain
International Conference on Parallel Computing (ParCo’2011), Ghent (Belgium), August-September 2011
(Advances in Parallel Computing, Vol. 22: Applications, Tools and Techniques on the Road to Exascale Computing, IOS Press, pp. 447-454, 2012)

A Case Study of the Task-Based Parallel Wavefront Pattern [doi]
A. Dios, R. Asenjo, A. Navarro, F. Corbera, E.L. Zapata
International Conference on Parallel Computing (ParCo’11),, Ghent (Belgium), August-September 2011
(Advances in Parallel Computing, Vol. 22: Applications, Tools and Techniques on the Road to Exascale Computing, IOS Press, pp. 65-72, 2012)

2010

Implementing a Chapel Library for Parallel IO [link]
R. Larrosa, A. Navarro, R. Asenjo, E.L. Zapata
XXI Jornadas de Paralelismo (JJPP'10) (parte de CEDI 2010), Valencia (Spain), September 2010

Evaluation of the Task Programming Model in the Parallelization of Wavefront Problems [link]
A.J. Dios, R. Asenjo, A. Navarro, F. Corbera, E.L. Zapata
XXI Jornadas de Paralelismo (JJPP'10) (parte de CEDI 2010), Valencia (Spain), September 2010

Tridiagonal Systems in Chapel. Case study: the Parallel Cyclic Reduction Algorithm [link]
A. Sanz, J. Lopez, A. Navarro, R. Asenjo
XXI Jornadas de Paralelismo (JJPP'10) (parte de CEDI 2010), Valencia (Spain), September 2010

Evaluation of the Task Programming Model in the Parallelization of Wavefront Problems [doi]
A.J. Dios, R. Asenjo, A. Navarro, F. Corbera, E.L. Zapata
12th IEEE International Conference on High Performance Computing and Communications (HPCC'10), Melbourne (Australia), September 2010

2009

On the Automatic Detection of Heap-Induced Data Dependencies with Interprocedural Shape Analysis [doi]
A. Tineo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
International Workshop on Advanced Distributed and Parallel Network Applications (ADPNA'09) (co-located with ICPP'09), Vienna, Austria, September 2009

Analytical Modeling of Pipeline Parallelism [doi]
A. Navarro, R. Asenjo, S. Tabik, C. Cascaval
18th International Conference on Parallel Architectures and Compilation Techniques (PACT'09), Raleigh (NC), USA, September 2009

Conflict Analysis for Heap-based Data Dependence Detection [doi]
R. Castillo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
International Parallel Computing Conference (ParCo'09), Lyon (France), September 2009
(Advances in Parallel Computing, Vol. 19: Parallel Computing: From Multicores and GPU's to Petascale, B. Chapman, F. Desprez, G.R. Joubert, A. Lichnewsky, F. Peters and T. Priol, Eds., pp. 351-358, 2010)

Load Balancing Using Work-Stealing for Pipeline Parallelism in Emerging Applications [doi]
A. Navarro, R. Asenjo, S. Tabik, C. Cascaval
23rd International Conference on Supercomputing (ICS'09), Yorktown Heights (NY), USA, June 2009

2008

Complete Def-Use Analysis in Recursive Programs with Dynamic Data Structures [doi]
R. Castillo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
Workshop on Productivity and Performance (PROPER'08) (co-located with Euro-Par'08), Las Palmas de Gran Canaria, Spain, August 2008
(Springer, LNCS 5415, E. Cesar, M. Alexander, A. Streit, J.L. Traff, C. Cerin, A. Knupfer, D. Kranzlmuller and S. Jha, Eds., pp. 273-282)

Parallelizing Irregular C Codes Assisted by Interprocedural Shape analysis [doi]
R. Asenjo, R. Castillo, F. Corbera, A. Navarro, A. Tineo, E.L. Zapata
22nd IEEE International Symposium on Parallel and Distributed Processing (IPDPS'08), Miami (FL), USA, April 2008

2007

Tracing Recursive Flow Paths for Interprocedural Shape Analysis [link]
A. Tineo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
20th International Workshop on Languages and Compilers for Parallel Computing (LCPC’07), Urbana, Illinois, October 2007 (poster)

Interfaz para la Captura de Estructuras de Datos Dinamicas en Codigos C
J.J. Segura, R. Asenjo, F. Corbera, A. Navarro, E.L. Zapata
XVIII Jornadas de Paralelismo (JJPP'07), Zaragoza (Spain), September 2007

A Compiler Framework for Automatic Parallelization of Pointer-Based Codes [link]
A. Tineo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
3rd International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (HiPEAC ACACES 2007), L'Aquila, Italy, July 2007 (poster)

Interprocedural Def-Use Chains for Pointer-Based Codes Optimizations [link]
R. Castillo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
3rd International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (HiPEAC ACACES 2007), L'Aquila, Italy, July 2007 (poster)

Parallelization of Dynamic Data Structures in Pointer-Based Programs
R. Castillo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
Transnational Access Meeting - HPC EUROPA EVENT, Bologna, Italy, June 2007

A Compiler Framework for Automatic Parallelization of Pointer-based Codes
A. Tineo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
Transnational Access Meeting - HPC EUROPA EVENT, Bologna, Italy, June 2007

Detecting Loop-Carried Dependences in Programs with Dynamic Data Structures [doi]
A. Navarro, F. Corbera, A. Tineo, R. Asenjo, E.L. Zapata
Journal of Parallel and Distributed Computing, 67 (1), January 2007, pp. 47-62

2006

Pointer Analysis Techniques Targeted to Accelerate Shape Analysis
R. Castillo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
XVII Jornadas de Paralelismo (JJPP'06), Albacete (Spain), September 2006

Towards a Versatile Pointer Analysis Framework [doi]
R. Castillo, A. Tineo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
12th European Conference on Parallel Processing (Euro-Par'06), Dresden (Germany), August-September 2006
(Springer, LNCS 4128, W.E. Nagel, W.V. Walter and W. Lehner, Eds., pp. 323-333)

Shape Analysis for Dynamic Data Structures based on Coexistent Links Sets [link]
A. Tineo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
12th Workshop on Compilers for Parallel Computing (CPC'06), A Coruña (Spain), January 2006

2005

A new Strategy for Shape Analysis based on Coexistent Links Sets [link]
A. Tineo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
International Conference on Parallel Computing (ParCo2005), Malaga (Spain), September 2005
(Parallel Computing: Current and Future Issues of High End Computing, John von Neumann Institute for Computing, Jülich, Germany, NIC Series Vol. 33, pp. 557-564, 2006)

A Novel Approach for Detecting Heap-based Loop-carried Dependences [doi]
A. Tineo, F. Corbera, A. Navarro, R. Asenjo, E.L. Zapata
International Conference on Parallel Processing (ICPP'05), Oslo (Norway), June 2005

On the Parallelization of Irregular and Dynamic Programs [doi]
O. Plata, R. Asenjo, E. Gutierrez, F. Corbera, A. Navarro, E.L. Zapata
Parallel Computing, 31 (6), June 2005, pp. 544-562

2004

Tutorial: Exploitation of Locality and Parallelism in Pointer-based Programs
O. Plata, R. Asenjo
13th International Conference on Parallel Architectures and Compilation Techniques (PACT'04), Antibes (Juan-les-Pins, France), September-October 2004

A New Dependence Test based on Shape Analysis for Pointer-based Codes [doi]
A. Navarro, F. Corbera, R. Asenjo, A. Tineo, O. Plata, E.L. Zapata
17ht International Workshop on Languages and Compilers for Parallel Computing (LCPC'04), West Lafayette (IN, USA), September 2004
(Springer, LNCS 3602, R. Eigenmann, Z. Li and S.P. Midkiff, Eds., pp. 394-408)

A new Loop-Carried Dependence Detection Approach for Pointer-based Codes
F. Corbera, A. Tineo, E.L. Zapata, A. Navarro, R. Asenjo
XV Jornadas de Paralelismo (JJPP'04), Almeria (Spain), September 2004

Exploiting Locality and Parallelism in Pointer-based Programs
A. Navarro, R.G. Valderrama, F. Corbera, E. Gutierrez, R. Asenjo, O. Plata, E.L. Zapata
11th Workshop on Compilers for Parallel Computers (CPC'04), Seeon Monastery (Chiemsee, Germany), July 2004

Adecuación de un Modelo de Enseñanza Superior en Modelo de Enseñanza Virtual
H. Rosales, J. Aldana, R. Asenjo, O. Trelles
1er Congreso Virtual Latinoamericano de Educacion a Distancia (LatinEduca 2004), March-April 2004.

Optimization Techniques for Irregular and Pointer-based Programs (Invited Talk) [doi]
R. Asenjo, F. Corbera, E. Gutierrez, A. Navarro, O. Plata, E.L. Zapata
12th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP'04), A Coruna, Spain, February 2004

A Framework to Capture Dynamic Data Structures in Pointer-Based Codes [doi]
F. Corbera, R. Asenjo, E.L. Zapata
IEEE Transactions on Parallel and Distributed Systems, 15 (2), February 2004, pp. 151-166

2003

On the Parallelization of Irregular and Dynamic Programs
O. Plata, R. Asenjo, E. Gutierrez, F. Corbera, A. Navarro, E.L. Zapata
10ht Workshop on Compilers for Parallel Computers (CPC'03), Amsterdam (The Netherlands), January 2003

2002

Towards Compiler Optimization of Codes Based on Arrays of Pointers [doi]
F. Corbera, R. Asenjo, E.L. Zapata
15th International Workshop on Languages and Compilers for Parallel Computing (LCPC'02), College Park (MD, USA), July 2002
(Springer, LNCS 2481, B. Pugh and C-W. Tseng, Eds., pp. 142-156)

Locality Analysis of Irregular and Dynamic Codes
O. Plata, R. Asenjo, E. Gutierrez, F. Corbera, E.L. Zapata
NATO Advanced Research Workshop on High Performance Computing: Technology and Applications, Cetraro (Italy), June 2002

New Shape Analysis and Interprocedural Techniques for Automatic Parallelization of C Codes [doi]
F. Corbera, R. Asenjo, E.L. Zapata
International Journal of Parallel Programming, 30 (1), February 2002, pp. 37-63

2001

Progressive Shape Analysis for Real C Codes [doi]
F. Corbera, R. Asenjo, E.L. Zapata
International Conference on Parallel Processing (ICPP'01), Valencia (Spain), September 2001

2000

Automatic Parallelization of Irregular Applications [doi]
E. Gutierrez, R. Asenjo, O. Plata, E.L. Zapata
Parallel Computing, 26 (13-14), December 2000, pp. 1709-1738

Un Paso en el Proceso de Paralelizacion Automática de Codigos C
F. Corbera, R. Asenjo, E.L. Zapata
XI Jornadas de Paralelismo (JJPP'00), Granada (Spain), September 2000

Accurate Shape Analysis for Recursive Data Structures [doi]
F. Corbera, R. Asenjo, E.L. Zapata
13th International Workshop on Languages and Compilers for Parallel Computing (LCPC'00), Yorktown Heights (NY, USA), August 2000
(Springer, LNCS 1947, S.P. Midkiff, J.E. Moreira, M. Gupta, S. Chatterjee, J. Ferrante, J. Prins, W. Pugh and C.-W. Tseng, Eds., pp. 1-15)

e-Commerce for Interactive Video Databases
R. Asenjo, A. Navarro, M. Rodriguez, M. Ujaldon, E.L. Zapata
International Conference on Advances in Infrastructure for Electronic Business, Science, and Education on the Internet (SSGRR'00), L'Aquila (Rome), July-August 2000

Automatic Iteration/Data Partitioning for Distributed Shared Memory Systems
A. Navarro, R. Asenjo, E.L. Zapata
NATO Advanced Research Workshop on High Performance Computing: Technology and Applications, Cetraro (Italy), June 2000

1999

Data-Parallel Support for Numerical Irregular Problems [doi]
E.L. Zapata, O. Plata, R. Asenjo, G.P. Trabado
Parallel Computing, 25 (13-14), December 1999, pp. 1971-1994

Access Descriptor Based Locality Analysis for Distributed-Shared Memory Multiprocessors [doi]
A. Navarro, R. Asenjo, E.L. Zapata, D. Padua
International Conference on Parallel Processing (ICPP'99), Aizu-Wakamatsu (Japan), September 1999

New Shape Analysis Techniques for Automatic Parallelization of C Codes [doi]
F. Corbera, R. Asenjo, E.L. Zapata
13th ACM International Conference on Supercomputing (ICS'99), Rhodes (Greece), June 1999

Parallel Pivots LU Algorithm on the Cray T3E [doi]
R. Asenjo, E.L. Zapata
4th International Conference of the Austrian Center for Parallel Computation (ACPC'99), Salzburg (Austria), February 1999
(Springer, LNCS 1557, P. Zinterhof, M. Vajtersic, and A. Uhl, Eds., pp. 38-47)

1998

HPF-2 Support for Dynamic Sparse Computations [doi]
R. Asenjo, O. Plata, J. Touriño, R. Doallo, E.L. Zapata
11th International Workshop on Languages and Compilers for Parallel Computing (LCPC'98), Chapel Hill (NC, USA), August 1998
(Springer, LNCS 1656, S. Chatterjee, J.F. Prins, L. Carter, J. Ferrante, Z. Li, D. Sehr and P-C. Yew, Eds., pp. 230-246)

1997

Paralelizacion Automatica de Codigos Fortran Irregulares
R. Asenjo, E. Gutierrez, Y. Lin, D. Padua, B. Pottenger, E.L. Zapata
VIII Jornadas de Paralelismo (JJPP'97), Caceres (Spain), September 1997

Virtual Animation of Tomographic Volumes on Multiprocessors
J.R. Cozar, R. Asenjo, E.L. Zapata
VII National Symposium on Pattern Recognition and Image Analysis, Bellaterra (Barcelona, Spain), April 1997

1996

Analyzing Data Structures for Parallel Sparse Direct Solvers: Pivoting and Fill-in
J. Touriño, R. Doallo, R. Asenjo, O. Plata, E.L. Zapata
6th Workshop on Compilers for Parallel Computers (CPC'96), Aachen (Germany), December 1996

Solving the Eigenvalues of Symmetric Sparse Matrices Applying Parallelism
M.A. Trenas, R. Asenjo, E.L. Zapata
2nd Euroconference on Supercomputation in Nonlinear and Disordered Systems: Algorithms, Applications and Architectures, San Lorenzo de El Escorial (Madrid, Spain), September 1996
(World Scientific, L. Vazquez, F. Tirado and I. Martin, Eds., pp. 347-351)

Iterative and Direct Sparse Solvers on Parallel Computers
R. Asenjo, G. Bandera, G.P. Trabado, O. Plata, E.L. Zapata
2nd Euroconference on Supercomputation in Nonlinear and Disordered Systems: Algorithms, Applications and Architectures, San Lorenzo de El Escorial (Madrid, Spain), September 1996
(World Scientific, L. Vazquez, F. Tirado and I. Martin, Eds., pp. 85-99)

Algoritmos Paralelos para el Calculo de Autovalores en Matrices Simetricas Dispersas
M.A. Trenas, R. Asenjo, E.L. Zapata
VII Jornadas de Paralelismo (JJPP'96), Santiago de Compostela (Spain), September 1996

Animacion Virtual de Volumenes Tomograficos en Multiprocesadores
J.R. Cozar, R. Asenjo, E.L. Zapata
VII Jornadas de Paralelismo (JJPP'96), Santiago de Compostela (Spain), September 1996

Compilation Issues for Irregular Problems
R. Asenjo, G.P. Trabado, M. Ujaldon, E.L. Zapata
Workshop on Parallel Programming Environments for High-Performance Computing, L'Alpe d'Huez (France), April 1996

1995

Sparse LU Factorization on the Cray T3D [doi]
R. Asenjo, E.L. Zapata
International Conference on High-Performance Computing and Networking (HPCN-Europe'95), Milan (Italy), May 1995
(Springer, LNCS 919, B. Hertzberger and G. Serazzi, Eds., pp. 690-696)

1994

Parallel Sparse LU Factorization
R. Asenjo, M. Ujaldon, E.L. Zapata
HPF-2: Scope of Activities and Motivating Applications, High Performance Fortran Forum, November 1994

Sparse Block and Cyclic Data Distributions for Matrix Computations
R. Asenjo, F. Romero, M. Ujaldon, E.L. Zapata
Advanced Workshop in High Performance Computing: Technology, Methods and Applications, Cetraro (Italy), June 1994
(Elsevier Science, Advances in Parallel Computing, Vol. 10, J.J. Dongarra, L. Grandinetti, G.R. Joubert and J.Kowalik, Eds., pp. 359-377, 1995)

3D Reconstruction of Macromolecules on Multiprocessors [doi]
M. Ujaldon, R. Asenjo, E.L. Zapata, J.C. Cabaleiro, J.M. Carazo
2nd EUROMICRO Workshop on Parallel and Distributed Processing (PDP'94), Malaga (Spain), January 1994

1993

Parallel WZ Factorization on Mesh Multiprocessors [doi]
R. Asenjo, M. Ujaldon, E.L. Zapata
Microprocessing and Microprogramming, 38 (1-5), September 1993, pp. 319-326

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