All Papers
Author: E. Gutierrez

2022

Speculative Barriers with Transactional Memory [doi]
M. Pedrero, R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
IEEE Transactions on Computers, 71 (1), January 2022, pp. 197-208

2021

An Abstract Machine Approach to Preserving Digital Information [doi]
I. Rummelhoff, E. Gutierrez, T. Kristoffersen, O. Liabo, B.M. Ostvold, O. Plata, S. Romero
IEEE Access, 9, November 2021, pp. 154914-154932

2020

NATSA: A Near-Data Processing Accelerator for Time Series Analysis [doi][arXiv]
I. Fernandez, R. Quislant, C. Giannoula, M. Alser, J. Gomez-Luna, E. Gutierrez, O. Plata, O. Mutlu
38th IEEE International Conference on Computer Design (ICCD'20), Hardtford (CT, USA), October 2020
(arXiv:2010.02079 [cs.AR])

Energy-Efficient Time Series Analysis Using Transprecision Computing [doi]
I. Fernandez, R. Quislant, E. Gutierrez, O. Plata
IEEE 32nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'20), Porto (Portugal), September 2020

2019

Accelerating Time Series Motif Discovery in the Intel Xeon Phi KNL Processor [doi]
I. Fernandez, A. Villegas, E. Gutierrez, O. Plata
The Journal of Supercomputing, 75, November 2019, pp. 7053-7075

Improving Hardware Transactional Memory Parallelization of Computational Geometry Algorithms Using Privatizing Transactions [doi]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
Journal of Parallel and Distributed Computing, 131, September 2019, pp. 103-119

Time Series Analysis Using Transprecision Computing [link]
I. Fernandez, E. Gutierrez, O. Plata
OPRECOMP Summer School, Perugia (Italy), September 2019

Aceleración del Análisis de Series Temporales en el Procesador Intel Xeon Phi KNL [link]
I. Fernandez, A. Villegas, E. Gutierrez, O. Plata
XIX Jornadas de Paralelismo (JJPP'19) (parte de las Jornadas Sarteco), Caceres (Spain), September 2019

Barreras Especulativas con Memoria Transaccional [link]
M. Pedrero, R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
XIX Jornadas de Paralelismo (JJPP'19) (parte de las Jornadas Sarteco), Caceres (Spain), September 2019

2018

Privatizing Transactions for Lee's Algorithm in Commercial Hardware Transactional Memory [doi]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
The Journal of Supercomputing, 74 (4), April 2018, pp. 1676-1694

TMbarrier: Speculative Barriers Using Hardware Transactional Memory [doi]
M. Pedrero, E. Gutierrez, O. Plata
26th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP'18), Cambridge (UK), March 2018

2017

ReduxSTM: Optimizing STM Designs for Irregular Applications [doi]
M. Pedrero, E. Gutierrez, S. Romero, O. Plata
Journal of Parallel and Distributed Computing, 107, September 2017, pp. 114-133

Mejora de la Escalabilidad de Sistemas de Memoria Transaccional Hardware [link]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
XXVIII Jornadas de Paralelismo (JJPP'17) (parte de las Jornadas Sarteco), Malaga (Spain), September 2017

Lazy Irrevocability for Best-Effort Transactional Memory Systems [doi]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
IEEE Transactions on Parallel and Distributed Systems, 28 (7), July 2017, pp. 1919-1932

Enhancing Scalability in Best-Effort Hardware Transactional Memory [doi]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
Journal of Parallel and Distributed Computing, 104, June 2017, pp. 73-87

Leveraging Irrevocability to Deal with Signature Saturation in Hardware Transactional Memory [doi]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
The Journal of Supercomputing, 73 (6), June 2017, pp. 2525-2557

2016

A Comparative Analysis of STM Approaches to Reduction Operations in Irregular Applications [doi]
M. Pedrero, E. Gutierrez, S. Romero, O. Plata
Journal of Computational Science, 17 (Part 3), November 2016, pp. 630-638

Analisis Comparativo del Uso de STMs en Codigos de Reduccion Irregulares [link]
M. Pedrero, E. Gutierrez, S. Romero, O. Plata
XXVII Jornadas de Paralelismo (JJPP'16) (parte de las Jornadas Sarteco), Salamanca (Spain), September 2016

Irrevocabilidad Relajada para Memoria Transaccional Hardware [link]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
XXVII Jornadas de Paralelismo (JJPP'16) (parte de las Jornadas Sarteco), Salamanca (Spain), September 2016

Insights into the Fallback Path of Best-Effort Hardware Transactional Memory Systems [doi]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
22nd International Conference on Parallel and Distributed Computing (Euro-Par'16), Grenoble (France), August 2016
(Springer, LNCS 9833, P-F. Dutot and D. Trystram, Eds., pp. 251-263)

Exploring Fallback Solutions in Best-Effort Hardware Transactional Memory [link]
R. Quislant, E. Gutierrez, O. Plata
19th Workshop on Compilers for Parallel Computing (CPC’16), Valladolid (Spain), July 2016

2015

Book Chapter: Conflict Detection in Hardware Transactional Memory [doi]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
Transactional Memory: Foundations, Algorithms, Tools and Applications (COST Action Euro-TM IC1001)
(Springer, LNCS 8913, R. Guerraoui and P. Romano, Eds., pp. 127-149, 2015)

Reduccion de la Saturacion en Signaturas Mediante Irrevocabilidad en Sistemas HTM [link]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
XXVI Jornadas de Paralelismo (JJPP'15) (parte de las Jornadas Sarteco), Cordoba (Spain), September 2015

Mejorando el Rendimiento en Aplicaciones Irregulares con Memoria Transaccional [link]
M. Pedrero, E. Gutierrez, S. Romero, O. Plata
XXVI Jornadas de Paralelismo (JJPP'15) (parte de las Jornadas Sarteco), Cordoba (Spain), September 2015

Improving Transactional Memory Performance for Irregular Applications [doi]
M. Pedrero, E. Gutierrez, S. Romero, O. Plata
International Conference on Computational Science (ICCS'15), Reykjavik, Iceland, June 2015
(Elsevier, Procedia Computer Science, Vol. 51, 2015, pp. 2714-2718)

Irrevocable Transactions to Handle Signature Saturation [link]
R. Quislant, E. Gutierrez, O. Plata
18th Workshop on Compilers for Parallel Computing (CPC'15), London (UK), January 2015

Effective Transactional Memory Execution Management for Improved Concurrency [link]
M.A. Gonzalez-Mesa, E. Gutierrez, E.L. Zapata, O. Plata
International HiPEAC Conference (HiPEAC'15), Amsterdam (The Netherlands), January 2015

2014

Improving Signature Behavior by Irrevocability in Transactional Memory Systems [doi]
R. Quislant, E. Gutierrez, E.L. Zapata, O. Plata
26th International Symposium on Computer Architecture and High-Performance Computing (SBAC-PAD'14), Paris (France), October 2014

Scalability Analysis of Signatures in Transactional Memory Systems [doi]
R. Quislant, E. Gutierrez, O. Plata
26th International Symposium on Computer Architecture and High-Performance Computing (SBAC-PAD'14), Paris (France), October 2014

Effective Transactional Memory Execution Management for Improved Concurrency [doi]
M.A. Gonzalez-Mesa, E. Gutierrez, E.L. Zapata, O. Plata
ACM Transactions on Architecture and Code Optimization, 11 (3), October 2014, Art. No. 24

Dealing with Saturation in Signature-based Transactional Memory Systems [link]
R. Quislant, E. Gutierrez, S. Gonzalez-Navarro, O. Plata
Euro-TM Workshop on Transactional Memory (WTM’2014) (co-located with EuroSys'14), Amsterdam (The Netherlands), April 2014

2013

E-assessment of Matlab Assignments in Moodle: Application to an Introductory Programming Course for Engineers [doi]
J. Ramos, M.A. Trenas, E. Gutierrez, S. Romero
Computer Applications in Engineering Education, 21 (4), December 2013, pp. 728-736

Exploring Irregular Reduction Support in Transactional Memory [doi]
M.A. Gonzalez-Mesa, R. Quislant, E. Gutierrez, O. Plata
13th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP'13), Vietri Sul Mare (Italy), December 2013
(Springer, LNCS 8285, Part I, J. Kolodziej, B.D. Martino, D. Talia and K. Xiong, Eds., pp. 257-266)

Dealing with Reduction Operations Using Transactional Memory [doi]
M.A. Gonzalez-Mesa, R. Quislant, E. Gutierrez, O. Plata
25th International Symposium on Computer Architecture and High-Performance Computing (SBACPAD'13), Porto de Galinhas (Brazil), October 2013

Parallelizing Irregular Reductions Using Transactions [link]
M.A. Gonzalez-Mesa, E. Gutierrez, O. Plata
17th Workshop on Compilers for Parallel Computing (CPC'13), Lyon (France), July 2013

Parallelizing the Sparse Matrix Transposition: Reducing the Programmer Effort Using Transactional Memory [doi]
M.A. Gonzalez-Mesa, E. Gutierrez, O. Plata
International Conference on Computational Science (ICCS'13), Barcelona (Spain), June 2013
(Elsevier, Procedia Computer Science. Vol. 18, June 2013, pp. 1436–1445)

An Experience of E-assessment in an Introductory Course on Computer Organization [doi]
E. Gutierrez, M.A. Trenas, F. Corbera, J. Ramos, S. Romero
International Conference on Computational Science (ICCS'13), Barcelona (Spain), June 2013
(Elsevier, Procedia Computer Science. Vol. 18, June 2013, pp. 1436–1445)

Efficient Support of Reduction Operations in Transactional Memory [link]
M.A. Gonzalez-Mesa, E. Gutierrez, S. Gonzalez-Navarro, O. Plata
Euro-TM Workshop on Transactional Memory (WTM'13) (co-located with EuroSys'13), Prague (Czech Republic), April 2013

Hardware Signature Designs to Deal with Asymmetry in Transactional Data Sets [doi]
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
IEEE Transactions On Parallel and Distributed Systems, 24 (3), March 2013, pp. 506-519

LS-Sig: Locality-Sensitive Signatures for Transactional Memory [doi]
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
IEEE Transactions On Computers, 62 (2), February 2013, pp. 322-335

2012

Leveraging Transactional Memory to Extract Parallelism [link]
M.A. Gonzalez-Mesa, E. Gutierrez, O. Plata
Euro-TM Workshop on Transactional Memory (WTM'12) (co-located with EuroSys'12), Bern (Switzerland), April 2012

Automatic Loop Parallelization Using Transactional Memory Support [link]
M.A. Gonzalez-Mesa, R. Quislant, E. Gutierrez, O. Plata
16th Workshop on Compilers for Parallel Computing (CPC'12), Padova (Italy), January 2012

2011

Unified Locality-Sensitive Signatures for Transactional Memory
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
XXII Jornadas de Paralelismo (JJPP’11), La Laguna, Tenerife (Spain), September 2011

Unified Locality-Sensitive Signatures for Transactional Memory [doi]
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
17th International Euro-Par Conference on Parallel Processing (Euro-Par’11), Bordeaux (France), August-September 2011
(Springer, LNCS 6852, E. Jeannot, R. Namyst and J. Roman, Eds., pp. 326-337)

Multiset Signatures for Transactional Memory [doi]
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
25th International Conference on Supercomputing (ICS'11), Tucson (AZ), USA, May-June 2011

2010

Interval Filter: A Locality-aware Alternative to Bloom Filters for Hardware Membership Queries [link]
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
XXI Jornadas de Paralelismo (JJPP'10) (parte de CEDI 2010), Valencia (Spain), September 2010

Interval Filter: A Locality-Aware Alternative to Bloom Filters for Hardware Membership Queries by Interval Classification [doi]
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
11th International Conference on Intelligent Data Engineering and Automated Learning (IDEAL'10), Paisley, Scotland (UK), September 2010
(Springer, LNCS 6283, C. Fyfe, P. Tino, D. Charles, C. Garcia-Osorio and H. Yin, Eds., pp. 162-169)

A New Moodle Module Supporting Automatic Verification of VHDL-based Assignments [doi]
E. Gutierrez, M.A. Trenas, J. Ramos, F. Corbera, S. Romero
Computers and Education, 54 (2), February 2010, pp. 562-577

Quantum Computer Simulation using the CUDA Programming Model [doi]
E. Gutierrez, S. Romero, M.A. Trenas, E.L. Zapata
Computer Physics Communications, 181 (2), February 2010, pp. 283-300

2009

Diseño de Signaturas Explotando Localidad en Memoria Transaccional
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
XXI Jornadas de Paralelismo (JJPP'09), A Coruña (Spain), September 2009

Un Modulo para la Gestion de Practicas de Tecnologia de Computadores en Moodle
J. Ramos, S. Romero, M.A. Trenas, F. Corbera, E. Gutierrez
XXI Jornadas de Paralelismo (JJPP'09), A Coruña (Spain), September 2009

Improving Signatures by Locality Exploitation for Transactional Memory [doi]
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
18th International Conference on Parallel Architectures and Compilation Techniques (PACT'09), Raleigh (NC), USA, September 2009

Signatures and Locality in Transactional Memory [link]
R. Quislant, E. Gutierrez, O. Plata, E.L. Zapata
5th International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (HiPEAC ACACES 2009), Terrassa, Spain, July 2009 (poster)

Experiences with Mapping Non-Linear Memory Access Patterns into GPUs [doi]
E. Gutierrez, S. Romero, M.A. Trenas, O. Plata
International Conference on Computational Science (ICCS'09), Baton Rouge (LA), USA, May 2009
(Springer, LNCS 5544, G. Allen, J. Nabrzyski, E. seidel, G.D. van Albada and J. Dongarra, Eds., pp. 924-933)

Strategies for Exploiting the GPU Memory Hierarchy for FFT [link]
E. Gutierrez, S. Romero, M.A. Trenas, O. Plata, E.L. Zapata
14th International Workshop on Compilers for Parallel Computers (CPC'09), Zurich, Switzerland, January 2009

2008

Development of a New MOODLE Module for a Basic Course on Computer Architecture [doi]
F. Corbera, E. Gutierrez, J. Ramos, S. Romero, M.A. Trenas
13th Annual Conference on Innovation and Technology in Computer Science Education (ITiCSE'08), Madrid, Spain, June-July 2008

Memory Locality Exploitation Strategies for FFT on the CUDA Architecture [doi]
E. Gutierrez, S. Romero, M.A. Trenas, E.L. Zapata
8th International Conference on High Performance Computing for Computational Science (VECPAR'08), Toulouse, France, June 2008
(Springer, LNCS 5336, J.M. Laginha, M. Palma, P.R. Amestoy, M. Dayde, M. Mattoso and J.C. Lopes; Eds., pp. 430-443)

Parallel Quantum Computer Simulation on the CUDA Architecture [doi]
E. Gutierrez, S. Romero, M.A. Trenas, E.L. Zapata
International Conference on Computational Science (ICCS'08), Krakow (Poland), June 2008
(Springer, LNCS 5101, M. Bubak, G.D. van Albada, J. Dongarra and P.M.A. Sloot, Eds., pp. 700-709)

An Analytical Model of Locality-based Parallel Irregular Reductions [doi]
E. Gutierrez, O. Plata, E.L. Zapata
Parallel Computing, 34 (3), March 2008, pp. 133-157

2007

Improving Quantum Gate Simulation using a GPU [doi]
E. Gutierrez, S. Romero, M.A. Trenas, E.L. Zapata
International Electronic Conference on Computer Science (IeCCS'07), November-December 2007
(AIP Conference Proceedings, Vol. 1060, Iss. 1, pp. 293-297)

Locality-Improved FFT Implementation on a Graphics Processor
S. Romero, M.A. Trenas, E. Gutierrez, E.L. Zapata
7h WSEAS International Conference on Signal Processing, Computational Geometry and Artificial Vision (ISCGAV'07), Athens, Greece, August 2007

Simulation of Quantum Gates on a Novel GPU Architecture
E. Gutierrez, S. Romero, M.A. Trenas, E.L. Zapata
7th WSEAS International Conference on Systems Theory and Scientific Computation (ISTASC’07), Athens, Greece, August 2007

A Simulation Tool Supporting a Basic Course on Computer Architecture [link]
E. Gutierrez, S. Romero, M.A. Trenas
IADIS International Conference e-Learning 2007 (part of MCCSIS'07), Lisbon, (Portugal), July 2007

A Learning Management System Designed for a Basic Laboratory Course on Computer Architecture [link]
E. Gutierrez, J. Ramos, S. Romero, M.A. Trenas
IADIS International Conference e-Learning 2007 (part of MCCSIS'07), Lisbon, (Portugal), July 2007

Modeling Memory Location Predictors for Pointer-Based Codes
A. Davila, E. Gutierrez, E.L. Zapata, O. Plata
13th Workshop on Compilers for Parallel Computing (CPC'07), Lisbon, Portugal, July 2007.

Implementation of an Integrated Management&Tracing System for Computer Technology Laboratory Practices in the Context of an ECTS Experience [link]
F. Corbera, E. Gutierrez, J. Ramos, S. Romero, M.A. Trenas
1st International Technology, Education and Development Conference (INTED'07), Valencia, Spain, March 2007

2006

Evaluacion de Mecanismos de Prediccion de Direcciones en Codigos basados en Punteros
A. Davila, E. Gutierrez, O. Plata, E.L. Zapata
XVII Jornadas de Paralelismo (JJPP'06), Albacete (Spain), September 2006

2005

On the Parallelization of Irregular and Dynamic Programs [doi]
O. Plata, R. Asenjo, E. Gutierrez, F. Corbera, A. Navarro, E.L. Zapata
Parallel Computing, 31 (6), June 2005, pp. 544-562

Parallel Techniques in Irregular Codes: Cloth Simulation as Case of Study [doi]
E. Gutierrez, S. Romero, F. Romero, O. Plata, E.L. Zapata
Journal of Parallel and Distributed Computing, 65 (4), April 2005, pp. 424-436.

2004

Parallelization Issues of a Code for Physically-based Simulation of Fabrics [doi]
S. Romero, E. Gutierrez, F. Romero, O. Plata, E.L. Zapata
Computer Physics Communications, 162 (3), October 2004, pp. 188-202

Experiencia Docente con un Servidor de Prácticas para la Asignatura Tecnología de Computadores
S. Romero, F. Corbera, E. Gutierrez, M.A. Trenas, J. Ramos
XV Jornadas de Paralelismo (JJPP'04), Almeria (Spain), September 2004

Explotando Localidad en Códigos Basados en Punteros
S. Romero, E. Gutierrez, E.L. Zapata, O. Plata
XV Jornadas de Paralelismo (JJPP'04), Almeria (Spain), September 2004

Exploiting Locality and Parallelism in Pointer-based Programs
A. Navarro, R.G. Valderrama, F. Corbera, E. Gutierrez, R. Asenjo, O. Plata, E.L. Zapata
11th Workshop on Compilers for Parallel Computers (CPC'04), Seeon Monastery (Chiemsee, Germany), July 2004

Data Partitioning-based Parallel Irregular Reductions [doi]
E. Gutierrez, O. Plata, E.L. Zapata
Concurrency and Computation: Practice and Experience, 16 (2-3), February-March 2004, pp. 155-172

Optimization Techniques for Irregular and Pointer-based Programs (Invited Talk) [doi]
R. Asenjo, F. Corbera, E. Gutierrez, A. Navarro, O. Plata, E.L. Zapata
12th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP'04), A Coruna, Spain, February 2004

2003

Optimization Techniques For Parallel Irregular Reductions [doi]
E. Gutierrez, O. Plata, E.L. Zapata
Journal of Systems Architecture, 49 (3), August 2003, pp. 63-74

Parallel Irregular Reduction Techniques for Cloth Simulation
E. Gutierrez, S. Romero, O. Plata, E.L. Zapata
Adaptivity in Parallel Scientific Computing (Seminar no. 03211) , Dagstuhl (Saarland, Germany), May 2003

On the Parallelization of Irregular and Dynamic Programs
O. Plata, R. Asenjo, E. Gutierrez, F. Corbera, A. Navarro, E.L. Zapata
10ht Workshop on Compilers for Parallel Computers (CPC'03), Amsterdam (The Netherlands), January 2003

2002

Paralelización de Reducciones por Afinidad de Escritura
E. Gutierrez, S. Romero, O. Plata, E.L. Zapata
XIII Jornadas de Paralelismo (JJPP'02), Lleida (Spain), September 2002

Estrategias de Paralelización Aplicadas a la Simulación de Tejidos
S. Romero, E. Gutierrez, F. Romero, J. Lopez, E.L. Zapata
XIII Jornadas de Paralelismo (JJPP'02), Lleida (Spain), September 2002

Locality Analysis of Irregular and Dynamic Codes
O. Plata, R. Asenjo, E. Gutierrez, F. Corbera, E.L. Zapata
NATO Advanced Research Workshop on High Performance Computing: Technology and Applications, Cetraro (Italy), June 2002

On Improving the Performance of Data Partitioning Oriented Parallel Irregular Reductions [doi]
E. Gutierrez, O. Plata, E.L. Zapata
10th Euromicro Workshop on Parallel, Distributed and Network-based Processing (PDP'02), Gran Canaria (Spain), January 2002

2001

Improving Parallel Irregular Reductions Using Partial Array Expansion [doi]
E. Gutierrez, O. Plata, E.L. Zapata
The IEEE/ACM International Conference for High Performance Computing and Communications (SC'01), Denver (CO, USA), November 2001

On Workload Balancing of Parallel Irregular Reductions
E. Gutierrez, O. Plata, E.L. Zapata
XII Jornadas de Paralelismo (JJPP'01), Valencia (Spain), September 2001

Balanced, Locality-Based Parallel Irregular Reductions [doi]
E. Gutierrez, O. Plata, E.L. Zapata
International Workshop on Languages and Compilers for Parallel Computing (LCPC'01), Cumberland Falls (KY, USA), August 2001
(Springer, LNCS 2624, H.G. Dietz, Ed., pp. 162-176)

Partial Array Expansion for Irregular Reductions [link]
E. Gutierrez, O. Plata, E.L. Zapata
9th Workshop on Compilers for Parallel Computers (CPC'01), Edinburgh (Scotland, UK), June 2001

2000

Automatic Parallelization of Irregular Applications [doi]
E. Gutierrez, R. Asenjo, O. Plata, E.L. Zapata
Parallel Computing, 26 (13-14), December 2000, pp. 1709-1738

A Compiler Method for the Parallel Execution of Irregular Reductions in Scalable Shared Memory Multiprocessors [doi]
E. Gutierrez, O. Plata, E.L. Zapata
14th ACM International Conference on Supercomputing (ICS'00), Santa Fe (NM, USA), May 2000

Scalable Automatic Parallelization of Irregular Reductions on Shared Memory Multiprocessors
E. Gutierrez, O. Plata, E.L. Zapata
8th Workshop on Compilers for Parallel Computers (CPC'00), Aussois (France), January 2000

1999

On Automatic Parallelization of Irregular Reductions on Scalable Shared Memory Systems [doi]
E. Gutierrez, O. Plata, E.L. Zapata
5th International European Conference on Parallel and Distributed Computing (EuroPar'99), Toulouse (France), August-September 1999
(Springer, LNCS 1685, P. Amestoy, P. Berger, M. Dayde, D. Ruiz, I. Duff, V. Fraysse and L. Giraud, Eds., pp. 422-429)

1998

Analisis de Reducciones Paralelas en Aplicaciones Irregulares
E. Gutierrez, O. Plata, E.L. Zapata
IX Jornadas de Paralelismo (JJPP'98), San Sebastian (Spain), September 1998

Data-Parallel Extensions for Numerical Irregular Problems
E.L. Zapata, O. Plata, E. Gutierrez
NATO Advanced Research Workshop on High Performance Computing: Technology and Applications, Cetraro (Italy), June 1998

1997

Paralelizacion Automatica de Codigos Fortran Irregulares
R. Asenjo, E. Gutierrez, Y. Lin, D. Padua, B. Pottenger, E.L. Zapata
VIII Jornadas de Paralelismo (JJPP'97), Caceres (Spain), September 1997

1996

1995

Exhibicion de Autoestereogramas por Ordenador
E. Gutierrez, J.R. Cozar
Ars Infographica: Audio, Video, Grafica, Ayuntamiento, Diputacion Provincial y Universidad de Malaga, 1995

1994

1993

1992

1991

1990

1989

1988

1986

1985

1984

1983

1982

1981

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